"High speed Fp multipliers and adders on FPGA platform."

Santosh Ghosh, Debdeep Mukhopadhyay, Dipanwita Roy Chowdhury (2010)

> Home

Details and statistics

DOI: 10.1109/DASIP.2010.5706241

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-21

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/dasip/GhoshMC10
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/dasip/GhoshMC10
Santosh Ghosh, Debdeep Mukhopadhyay, Dipanwita Roy Chowdhury:
High speed Fp multipliers and adders on FPGA platform. DASIP 2010: 21-26

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.