"Automated Systolic Array Architecture Synthesis for High Throughput CNN ..."

Xuechao Wei et al. (2017)

> Home

Details and statistics

DOI: 10.1145/3061639.3062207

access: closed

type: Conference or Workshop Paper

metadata version: 2025-01-19

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/dac/WeiYZCWHLC17
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/dac/WeiYZCWHLC17
Xuechao Wei, Cody Hao Yu, Peng Zhang, Youxiang Chen, Yuxin Wang, Han Hu, Yun Liang, Jason Cong:
Automated Systolic Array Architecture Synthesis for High Throughput CNN Inference on FPGAs. DAC 2017: 29:1-29:6

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.