"Generation of yield-aware Pareto surfaces for hierarchical circuit design ..."

Saurabh K. Tiwary, Pragati K. Tiwary, Rob A. Rutenbar (2006)

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DOI: 10.1145/1146909.1146921

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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Saurabh K. Tiwary, Pragati K. Tiwary, Rob A. Rutenbar:
Generation of yield-aware Pareto surfaces for hierarchical circuit design space exploration. DAC 2006: 31-36

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