"Timing- and Constraint-Oriented Placement for Interconnected LSIs in ..."

Yasushi Ogawa et al. (1991)

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DOI: 10.1145/127601.127676

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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Yasushi Ogawa, Tsutomu Itoh, Yoshio Miki, Tatsuki Ishii, Yasuo Sato, Reiji Toyoshima:
Timing- and Constraint-Oriented Placement for Interconnected LSIs in Mainframe Design. DAC 1991: 253-258

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