"On-chip interconnect-aware design and modeling methodology, based on high ..."

David Goren et al. (2003)

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DOI: 10.1145/775832.776017

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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  - https://dblp.org/rec/conf/dac/GorenZGWBALSTGPJSSDH03
David Goren, Michael Zelikson, Rachel Gordin, Israel A. Wagner, Anastasia Barger, Alon Amir, Betty Livshitz, Anatoly Sherman, Youri Tretiakov, Robert A. Groves, J. Park, Donald L. Jordan, Sue E. Strang, Raminderpal Singh, Carl E. Dickey, David L. Harame:
On-chip interconnect-aware design and modeling methodology, based on high bandwidth transmission line devices. DAC 2003: 724-727

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