"Total power reduction in CMOS circuits via gate sizing and multiple ..."

Feng Gao, John P. Hayes (2005)

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DOI: 10.1145/1065579.1065593

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-09

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Feng Gao, John P. Hayes:
Total power reduction in CMOS circuits via gate sizing and multiple threshold voltages. DAC 2005: 31-36

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