"SystemVerilog implicit port enhancements accelerate system design & ..."

Clifford E. Cummings (2008)

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DOI: 10.1145/1391469.1391528

access: closed

type: Conference or Workshop Paper

metadata version: 2020-07-28

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Clifford E. Cummings:
SystemVerilog implicit port enhancements accelerate system design & verification. DAC 2008: 231-236

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