"VLSI Structure-aware Placement for Convolutional Neural Network ..."

Yun Chou et al. (2021)

> Home

Details and statistics

DOI: 10.1109/DAC18074.2021.9586294

access: closed

type: Conference or Workshop Paper

metadata version: 2021-11-12

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/dac/ChouHCC21
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/dac/ChouHCC21
Yun Chou, Jhih-Wei Hsu, Yao-Wen Chang, Tung-Chieh Chen:
VLSI Structure-aware Placement for Convolutional Neural Network Accelerator Units. DAC 2021: 1117-1122

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.