"An 8x8 run-time reconfigurable FPGA embedded in a SoC."

Sumanta Chaudhuri et al. (2008)

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DOI: 10.1145/1391469.1391500

access: closed

type: Conference or Workshop Paper

metadata version: 2025-01-19

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  dblp key:
  - conf/dac/ChaudhuriGFHD08
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  - https://dblp.org/rec/conf/dac/ChaudhuriGFHD08
Sumanta Chaudhuri, Sylvain Guilley, Florent Flament, Philippe Hoogvorst, Jean-Luc Danger:
An 8x8 run-time reconfigurable FPGA embedded in a SoC. DAC 2008: 120-125

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