"A High-Performance Hardware Architecture for a Frameless Stereo Vision ..."

Florian Eibensteiner, Jürgen Kogler, Josef Scharinger (2014)

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DOI: 10.1109/CVPRW.2014.97

access: closed

type: Conference or Workshop Paper

metadata version: 2024-10-06

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Florian Eibensteiner, Jürgen Kogler, Josef Scharinger:
A High-Performance Hardware Architecture for a Frameless Stereo Vision Algorithm Implemented on a FPGA Platform. CVPR Workshops 2014: 637-644

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