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ORCID"Architecture level TSV count minimization methodology for 3D tree-based FPGA."
Vinod Pangracious, Habib Mehrez, Zied Marrakchi (2013)
- Vinod Pangracious
, Habib Mehrez, Zied Marrakchi:
Architecture level TSV count minimization methodology for 3D tree-based FPGA. COOL Chips 2013: 1-3
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