"A 4.2pJ/Pixel 480 fps Stereo Vision Processor with Pixel Level Pipelined ..."

Zehao Li et al. (2024)

> Home

Details and statistics

DOI: 10.1109/CICC60959.2024.10528980

access: closed

type: Conference or Workshop Paper

metadata version: 2024-06-03

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/cicc/LiLDK24
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/cicc/LiLDK24
Zehao Li, Yuncheng Lu, Anh Tuan Do, Tony Tae-Hyoung Kim:
A 4.2pJ/Pixel 480 fps Stereo Vision Processor with Pixel Level Pipelined Architecture and Two-Path Aggregation Semi-Global Matching. CICC 2024: 1-2

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.