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"A 40nm 0.35V 25MHz Half-Select Disturb-Free Bitinterleaving 10T SRAM With ..."

Yifei Li et al. (2023)

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DOI: 10.1109/CICC57935.2023.10121235

access: closed

type: Conference or Workshop Paper

metadata version: 2023-06-26

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Yifei Li, Jian Chen, Yuqi Wang, Zihan Yin, Hongyu Chen, Yajun Ha:
A 40nm 0.35V 25MHz Half-Select Disturb-Free Bitinterleaving 10T SRAM With Data-Aware Write-Path. CICC 2023: 1-2

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