"A 1.8 V fully embedded 10 b 160 MS/s two-step ADC in 0.18 μm CMOS."

Martin Clara, Andreas Wiesbauer, Franz Kuttner (2002)

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DOI: 10.1109/CICC.2002.1012868

access: closed

type: Conference or Workshop Paper

metadata version: 2022-10-04

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Martin Clara, Andreas Wiesbauer, Franz Kuttner:
A 1.8 V fully embedded 10 b 160 MS/s two-step ADC in 0.18 μm CMOS. CICC 2002: 437-440

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