"Power Analysis of an FPGA: Implementation of Rijndael: Is Pipelining a DPA ..."

François-Xavier Standaert, Siddika Berna Örs, Bart Preneel (2004)

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DOI: 10.1007/978-3-540-28632-5_3

access: closed

type: Conference or Workshop Paper

metadata version: 2020-12-29

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François-Xavier Standaert, Siddika Berna Örs, Bart Preneel:
Power Analysis of an FPGA: Implementation of Rijndael: Is Pipelining a DPA Countermeasure? CHES 2004: 30-44

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