"Modeling Timing Behavior of Logic Circuits Using Piecewise Linear Models."

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

Zainalabedin Navabi et al. (1993)

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DOI: —

access: unavailable

type: Conference or Workshop Paper

metadata version: 2002-01-03

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  dblp key:
  - conf/chdl/NavabiHEV93
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  persistent URL:
  - https://dblp.org/rec/conf/chdl/NavabiHEV93
Zainalabedin Navabi, Amirhooshang Hashemi, Massoud Eghtesad, Mankuan Michael Vai:
Modeling Timing Behavior of Logic Circuits Using Piecewise Linear Models. CHDL 1993: 569-586

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