"Input Sensitive VLSI Layouts for Graphs of Arbitrary Degree."

Deepak D. Sherlekar, Joseph F. JáJá (1988)

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DOI: 10.1007/BFB0040394

access: closed

type: Conference or Workshop Paper

metadata version: 2021-07-02

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Deepak D. Sherlekar, Joseph F. JáJá:
Input Sensitive VLSI Layouts for Graphs of Arbitrary Degree. AWOC 1988: 268-277

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