"Testing of Interconnect Defects in Memory Based Reconfigurable Logic ..."

Senling Wang et al. (2017)

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DOI: 10.1109/ATS.2017.16

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Senling Wang, Yoshinobu Higami, Hiroshi Takahashi, Masayuki Sato, Mitsunori Katsu, Shoichi Sekiguchi:
Testing of Interconnect Defects in Memory Based Reconfigurable Logic Device (MRLD). ATS 2017: 17-22

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