"A Method to Reduce Power Dissipation during Test for Sequential Circuits."

Yoshinobu Higami, Shin-ya Kobayashi, Yuzo Takamatsu (2002)

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DOI: 10.1109/ATS.2002.1181732

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Yoshinobu Higami, Shin-ya Kobayashi, Yuzo Takamatsu:
A Method to Reduce Power Dissipation during Test for Sequential Circuits. Asian Test Symposium 2002: 326-331

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