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"Gate-level modelling and verification of asynchronous circuits using CSPM ..."

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

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Mark B. Josephs (2007)

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Dagstuhl

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DOI: 10.1109/ASYNC.2007.19

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

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Mark B. Josephs:
Gate-level modelling and verification of asynchronous circuits using CSPM and FDR. ASYNC 2007: 83-94

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last updated on 2023-03-23 23:58 CET by the dblp team

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