"A 12.4TOPS/W, 20% Less Gate Count Bidirectional Phase Domain MAC Circuit ..."

Yosuke Toyama et al. (2018)

> Home

Details and statistics

DOI: 10.1109/ASSCC.2018.8579253

access: closed

type: Conference or Workshop Paper

metadata version: 2022-12-07

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/asscc/ToyamaYBSO18
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/asscc/ToyamaYBSO18
Yosuke Toyama, Kentaro Yoshioka, Koichiro Ban, Akihide Sai, Kohei Onizuka:
A 12.4TOPS/W, 20% Less Gate Count Bidirectional Phase Domain MAC Circuit for DNN Inference Applications. A-SSCC 2018: 1-4

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.