"CompAcc: Efficient Hardware Realization for Processing Compressed Neural ..."

Zexi Ji et al. (2020)

> Home

Details and statistics

DOI: 10.1109/A-SSCC48613.2020.9336148

access: closed

type: Conference or Workshop Paper

metadata version: 2024-05-07

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/asscc/JiJWSLC20
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/asscc/JiJWSLC20
Zexi Ji, Wanyeong Jung, Jongchan Woo, Khushal Sethi, Shih-Lien Lu, Anantha P. Chandrakasan:
CompAcc: Efficient Hardware Realization for Processing Compressed Neural Networks Using Accumulator Arrays. A-SSCC 2020: 1-4

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.