"A 1.2-GS/s 8-bit two-step SAR ADC in 65-nm CMOS with passive residue transfer."

Hai Huang, Ling Du, Yun Chiu (2015)

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DOI: 10.1109/ASSCC.2015.7387462

access: closed

type: Conference or Workshop Paper

metadata version: 2017-09-18

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Hai Huang, Ling Du, Yun Chiu:
A 1.2-GS/s 8-bit two-step SAR ADC in 65-nm CMOS with passive residue transfer. A-SSCC 2015: 1-4

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