"A 12 bit 150 MS/s 1.5 mW SAR ADC with adaptive radix DAC in 40 nm CMOS."

Kwuang-Han Chang, Chih-Cheng Hsieh (2016)

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DOI: 10.1109/ASSCC.2016.7844159

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-24

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Kwuang-Han Chang, Chih-Cheng Hsieh:
A 12 bit 150 MS/s 1.5 mW SAR ADC with adaptive radix DAC in 40 nm CMOS. A-SSCC 2016: 157-160

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