"Test infrastructure design for core-based system-on-chip under ..."

Thomas Edison Yu et al. (2009)

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DOI: 10.1109/ASPDAC.2009.4796577

access: closed

type: Conference or Workshop Paper

metadata version: 2022-01-03

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Thomas Edison Yu, Tomokazu Yoneda, Krishnendu Chakrabarty, Hideo Fujiwara:
Test infrastructure design for core-based system-on-chip under cycle-accurate thermal constraints. ASP-DAC 2009: 793-798

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