"Hierarchical computation of 3-D interconnect capacitance using direct ..."

Jiangchun Gu, Zeyi Wang, Xianlong Hong (2000)

> Home

Details and statistics

DOI: 10.1145/368434.368741

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

- view
  authority control:
- export record
  dblp key:
  - conf/aspdac/GuWH00
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/aspdac/GuWH00
Jiangchun Gu, Zeyi Wang, Xianlong Hong:
Hierarchical computation of 3-D interconnect capacitance using direct boundary element method. ASP-DAC 2000: 447-452

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.