"Design of 56 Gb/s PAM4 wire-line receiver with ring VCO based CDR in a 65 ..."

Fangxu Lv et al. (2017)

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DOI: 10.1109/ASICON.2017.8252531

access: closed

type: Conference or Workshop Paper

metadata version: 2018-01-17

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Fangxu Lv, Jianye Wang, Dengjie Wang, Yongcong Liu, Ziqiang Wang:
Design of 56 Gb/s PAM4 wire-line receiver with ring VCO based CDR in a 65 nm CMOS technology. ASICON 2017: 537-540

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