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"Balance power leakage to fight against side-channel analysis at gate level ..."
Xin Fang et al. (2015)
- Xin Fang, Pei Luo, Yunsi Fei, Miriam Leeser:
Balance power leakage to fight against side-channel analysis at gate level in FPGAs. ASAP 2015: 154-155
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