"Reconfigurable RISC - A New Approach for Space-Efficient Superscalar ..."

Sascha Wennekers, Christian Siemers (2002)

> Home

Details and statistics

DOI: 10.1007/3-540-45997-9_13

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-24

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/arcs/WennekersS02
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/arcs/WennekersS02
Sascha Wennekers, Christian Siemers:
Reconfigurable RISC - A New Approach for Space-Efficient Superscalar Microprocessor Architecture. ARCS 2002: 165-178

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.