"FPGA Accelerated Parallel Sparse Matrix Factorization for Circuit Simulations."

Wei Wu et al. (2011)

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DOI: 10.1007/978-3-642-19475-7_33

access: closed

type: Conference or Workshop Paper

metadata version: 2017-09-25

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Wei Wu, Yi Shan, Xiaoming Chen, Yu Wang, Huazhong Yang:
FPGA Accelerated Parallel Sparse Matrix Factorization for Circuit Simulations. ARC 2011: 302-315

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