Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"Evaluation of High-Level Synthesis Techniques for Memory and Datapath ..."

Efstathios Sotiriou-Xanthopoulos, Dionysios Diamantopoulos, George Economakos (2015)

> Home

Details and statistics

DOI: 10.1007/978-3-319-16214-0_27

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/arc/Sotiriou-Xanthopoulos15
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/arc/Sotiriou-Xanthopoulos15
Efstathios Sotiriou-Xanthopoulos, Dionysios Diamantopoulos, George Economakos:
Evaluation of High-Level Synthesis Techniques for Memory and Datapath Tradeoffs in FPGA Based SoC Architectures. ARC 2015: 321-330

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.