"Faster Convolutional Neural Networks in Low Density FPGAs Using Block Pruning."

Tiago Peres, Ana Gonçalves, Mário P. Véstias (2019)

> Home

Details and statistics

DOI: 10.1007/978-3-030-17227-5_28

access: closed

type: Conference or Workshop Paper

metadata version: 2019-04-12

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/arc/PeresGV19
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/arc/PeresGV19
Tiago Peres, Ana Gonçalves, Mário P. Véstias:
Faster Convolutional Neural Networks in Low Density FPGAs Using Block Pruning. ARC 2019: 402-416

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.