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"A SystemVerilog-UVM Methodology for the Design, Simulation and ..."
Sara Marconi et al. (2015)
- Sara Marconi, Elia Conti, Pisana Placidi, Andrea Scorzoni, Jorgen Christiansen, Tomasz Hemperek:
A SystemVerilog-UVM Methodology for the Design, Simulation and Verification of Complex Readout Chips in High Energy Physics Applications. ApplePies 2015: 35-41
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