"High density bit-serial FPGA with LUT embedding shift register function."

Tsuyoshi Isshiki et al. (2002)

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DOI: 10.1109/APCCAS.2002.1115034

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-17

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Tsuyoshi Isshiki, Akihisa Ohta, T. Watanabe, T. Nakada, K. Akahane, I. Sisla, Dongju Li, Hiroaki Kunieda:
High density bit-serial FPGA with LUT embedding shift register function. APCCAS (1) 2002: 475-480

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