"High throughput 32-bit AES implementation in FPGA."

Chi-Jeng Chang et al. (2008)

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DOI: 10.1109/APCCAS.2008.4746393

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-17

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Chi-Jeng Chang, Chi-Wu Huang, Kuo-Huang Chang, Yi-Cheng Chen, Chung-Cheng Hsieh:
High throughput 32-bit AES implementation in FPGA. APCCAS 2008: 1806-1809

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