![](https://dblp.uni-trier.de./img/logo.ua.320x120.png)
![](https://dblp.uni-trier.de./img/dropdown.dark.16x16.png)
![](https://dblp.uni-trier.de./img/peace.dark.16x16.png)
Остановите войну!
for scientists:
![search dblp search dblp](https://dblp.uni-trier.de./img/search.dark.16x16.png)
![search dblp](https://dblp.uni-trier.de./img/search.dark.16x16.png)
default search action
"The logical design of a 1-microsecond parallel adder using 1-megacycle ..."
Arnold Weinberger, Jay L. Smith (1956)
- Arnold Weinberger, Jay L. Smith:
The logical design of a 1-microsecond parallel adder using 1-megacycle circuitry. AIEE-IRE Computer Conference (Western) 1956: 103-108
![](https://dblp.uni-trier.de./img/cog.dark.24x24.png)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.