"Fault insertion techniques and models for digital logic simulation."

Stephen A. Szygenda, Edward W. Thompson (1972)

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DOI: 10.1145/1480083.1480112

access: closed

type: Conference or Workshop Paper

metadata version: 2019-08-04

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Stephen A. Szygenda, Edward W. Thompson:
Fault insertion techniques and models for digital logic simulation. AFIPS Fall Joint Computing Conference (2) 1972: 875-884

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