"A CNN Hardware Accelerator in FPGA for Stacked Hourglass Network."

Dongbao Liang et al. (2020)

> Home

Details and statistics

DOI: 10.1007/978-981-15-8135-9_8

access: closed

type: Conference or Workshop Paper

metadata version: 2022-03-23

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/aca/LiangXYS20
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/aca/LiangXYS20
Dongbao Liang, Jiale Xiao, Yangbin Yu, Tao Su:
A CNN Hardware Accelerator in FPGA for Stacked Hourglass Network. ACA 2020: 101-116

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.