"Novel local stress evaluation method in 3D IC using DRAM cell array with ..."

Seiya Tanikawa et al. (2015)

> Home

Details and statistics

DOI: 10.1109/3DIC.2015.7334557

access: closed

type: Conference or Workshop Paper

metadata version: 2021-10-14

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/3dic/TanikawaKFKT15
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/3dic/TanikawaKFKT15
Seiya Tanikawa, Hisashi Kino, Takafumi Fukushima, Mitsumasa Koyanagi, Tetsu Tanaka:
Novel local stress evaluation method in 3D IC using DRAM cell array with planar mOS capacitors. 3DIC 2015: TS3.1.1-TS3.1.4

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.