"Routing Congestion in VLSI Circuits - Estimation and Optimization."

Prashant Saxena, Rupesh S. Shelar, Sachin S. Sapatnekar (2007)

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DOI: 10.1007/0-387-48550-3

access: closed

type: Book or Thesis

metadata version: 2017-05-16

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Prashant Saxena, Rupesh S. Shelar, Sachin S. Sapatnekar:
Routing Congestion in VLSI Circuits - Estimation and Optimization. Series on Integrated Circuits and Systems, Springer 2007, ISBN 978-0-387-30037-5, pp. I-XIV, 1-248

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