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ORCIDYoussef Saab
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2000 – 2009
- 2004
[j17]Youssef Saab:
An Effective Multilevel Algorithm for Bisecting Graphs and Hypergraphs. IEEE Trans. Computers 53(6): 641-652 (2004)- 2002
- [j16]Youssef Saab:
A Contraction-based Ratio-cut Partitioning Algorithm. VLSI Design 15(2): 485-489 (2002) - 2001
- [j15]Youssef Saab:
A Fast and Effective Algorithm for the Feedback Arc Set Problem. J. Heuristics 7(3): 235-250 (2001) - 2000
- [j14]Youssef Saab:
Guest Editorial. VLSI Design 11(3) (2000) - [j13]Youssef Saab:
A New 2-way Multi-level Partitioning Algorithm. VLSI Design 11(3): 301-310 (2000) - [c7]Youssef Saab:
A New Effective And Efficient Multi-Level Partitioning Algorithm. DATE 2000: 112-116
1990 – 1999
- 1999
- [j12]Youssef Saab, Michael A. VanPutte:
Shortest path planning on topographical maps. IEEE Trans. Syst. Man Cybern. Part A 29(1): 139-150 (1999) - 1997
- [j11]Youssef Saab:
Combinatorial Optimization by Dynamic Contraction. J. Heuristics 3(3): 207-224 (1997) - [j10]Youssef Saab:
An Improved Algorithm for Intersecting Convex Polygons. Inf. Process. Lett. 61(2): 89-90 (1997) - 1996
- [j9]Youssef Saab:
An improved linear placement algorithm using node compaction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15(8): 952-958 (1996) - [j8]Daniel G. Saab, Youssef Saab, Jacob A. Abraham:
Automatic test vector cultivation for sequential VLSI circuits using genetic algorithms. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15(10): 1278-1285 (1996) - [j7]Youssef Saab:
A Fast Clustering-Based Min-Cut Placement Algorithm With Simulated-Annealing Performance. VLSI Design 5(1): 37-48 (1996) - 1995
- [j6]Youssef Saab:
Iterative Improvement of Vertex Covers. Inf. Process. Lett. 55(2): 95-98 (1995) - [j5]Youssef Saab:
A Fast and Robust Network Bisection Algorithm. IEEE Trans. Computers 44(7): 903-913 (1995) - [j4]Youssef Saab:
New Methods for the Construction of Test Cases for Partitioning Heuristics. VLSI Design 3(1): 93-98 (1995) - 1994
- [j3]Youssef Saab, Cheng-Hua Chen:
An Effective Solution to the Linear Placement Problem. VLSI Design 2(2): 117-129 (1994) - [c6]Daniel G. Saab, Youssef Saab, Jacob A. Abraham:
Iterative [simulation-based genetics + deterministic techniques]= complete ATPG0. ICCAD 1994: 40-43 - 1993
- [c5]Youssef Saab:
Post-analysis-based clustering dramatically improves the Fiduccia-Mattheyses algorithm. EURO-DAC 1993: 22-27 - 1992
- [c4]Daniel G. Saab, Youssef Saab, Jacob A. Abraham:
CRIS: a test cultivation program for sequential VLSI circuits. ICCAD 1992: 216-219 - 1991
- [j2]Youssef Saab, Vasant B. Rao:
Combinatorial optimization by stochastic evolution. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10(4): 525-535 (1991) - 1990
- [b1]Youssef Saab:
Combinatorial optimization by stochastic evolution with applications to the physical design of VLSI circuits. University of Illinois Urbana-Champaign, USA, 1990 - [j1]Youssef Saab, Vasant B. Rao:
Fast effective heuristics for the graph bisectioning problem. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9(1): 91-98 (1990) - [c3]Youssef Saab, Vasant B. Rao:
Stochastic Evolution: a Fast Effective Heuristic for Some Generic Layout Problems. DAC 1990: 26-31
1980 – 1989
- 1989
- [c2]Youssef Saab, Vasant B. Rao:
An Evolution-Based Approach to Partitioning ASIC Systems. DAC 1989: 767-770 - [c1]Youssef Saab, Vasant B. Rao:
A Stochastic Algorithm for Circuit Bi-Partitioning. Great Lakes Computer Science Conference 1989: 313-321
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