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ORCIDPonnathpur R. Mukund
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Journal Articles
- 2018
[j11]Lucas Prilenski, P. R. Mukund:
A sub 1-volt subthreshold bandgap reference at the 14 nm FinFET node. Microelectron. J. 79: 17-23 (2018)- 2015
- [j10]Mark Pude, P. R. Mukund, Jeff Burleson:
Positive feedback for gain enhancement in sub-100 nm multi-GHz CMOS amplifier design. Int. J. Circuit Theory Appl. 43(1): 111-124 (2015) - 2014
- [j9]Eric Bohannon, Clyde Washburn, P. R. Mukund:
An ultra-thin oxide sub-1 V CMOS bandgap voltage reference. Int. J. Circuit Theory Appl. 42(8): 842-857 (2014) - 2011
- [j8]Christopher Urban, James E. Moon, Ponnathpur R. Mukund:
Scaling the bulk-driven MOSFET into deca-nanometer bulk CMOS processes. Microelectron. Reliab. 51(4): 727-732 (2011) - [j7]Eric Bohannon, Clyde Washburn, Ponnathpur R. Mukund:
Analog IC Design in Ultra-Thin Oxide CMOS Technologies With Significant Direct Tunneling-Induced Gate Current. IEEE Trans. Circuits Syst. I Regul. Pap. 58-I(4): 645-653 (2011) - 2010
- [j6]Eric Bohannon, Christopher Urban, Mark Pude, Yoshinori Nishi, Anand Gopalan, Ponnathpur R. Mukund:
Passive and Active Reduction Techniques for On-Chip High-Frequency Digital Power Supply Noise. IEEE Trans. Very Large Scale Integr. Syst. 18(1): 157-161 (2010) - 2006
- [j5]Tejasvi Das, Anand Gopalan, Clyde Washburn, P. R. Mukund:
Towards Fault-Tolerant RF Front Ends. J. Electron. Test. 22(4-6): 371-386 (2006) - 2005
- [j4]Anand Gopalan, Martin Margala
, P. R. Mukund:
A current based self-test methodology for RF front-end circuits. Microelectron. J. 36(12): 1091-1102 (2005) - [j3]Rajesh Narasimha, Sripriya R. Bandi, Raghuveer M. Rao, Ponnathpur R. Mukund:
1/f noise synthesis model in discrete-time for circuit simulation. IEEE Trans. Circuits Syst. I Regul. Pap. 52-I(6): 1104-1114 (2005) - [j2]Tejasvi Das, Anand Gopalan, Clyde Washburn, Ponnathpur R. Mukund:
Self-calibration of input-match in RF front-end circuitry. IEEE Trans. Circuits Syst. II Express Briefs 52-II(12): 821-825 (2005) - 1993
- [j1]P. R. Mukund, John F. McDonald:
MCM: The High-Performance Electronic Packaging Technology. Computer 26(4): 10-12 (1993)
Conference and Workshop Papers
- 2015
- [c24]Evan K. Jorgensen, P. R. Mukund:
A comparative study of multi-GHz LCVCOs designed in 28nm CMOS technology. SoCC 2015: 82-87 - 2010
- [c23]P. R. Mukund:
From Film to Silicon: The Migration of Document Archiving Technology. SoCC 2010: 205 - 2007
- [c22]Tejasvi Das, P. R. Mukund:
Sensitivity analysis for fault-analysis and tolerance in RF front-end circuitry. DATE 2007: 1277-1282 - 2006
- [c21]Tejasvi Das, Ponnathpur R. Mukund:
Self-calibration of gain and output match in LNAs. ISCAS 2006 - [c20]Mark Pude, Clyde Washburn, Ponnathpur R. Mukund, Kouichi Abe, Yoshinori Nishi:
An analytical propagation delay model with power supply noise effects. ISCAS 2006 - [c19]S. Sridharan, Sripriya R. Bandi, Clyde Washburn, Ponnathpur R. Mukund, Jan Kolnik, Ken Paradis, Steve Howard, Jeff Burleson:
A universal common-source and common-drain model for 1-20GHz frequency range. ISCAS 2006 - 2005
- [c18]Anand Gopalan, Tejasvi Das, Clyde Washburn, Ponnathpur R. Mukund:
Use of source degeneration for non-intrusive BIST of RF front-end circuits. ISCAS (5) 2005: 4385-4388 - [c17]Sripriya R. Bandi, Clyde Washburn, P. R. Mukund, Jan Kolnik, Minxuan Liu, Ken Paradis, Steve Howard, Jeff Burleson:
Accurate performance prediction of multi-GHz CML with data run-length variations. ISCAS (5) 2005: 5103-5106 - [c16]Tejasvi Das, Clyde Washburn, P. R. Mukund, Steve Howard, Ken Paradis, Jung-Geau Jang, Jan Kolnik, Jeff Burleson:
Effects of Technology and Dimensional Scaling on Input Loss Prediction of RF MOSFETs. VLSI Design 2005: 295-300 - [c15]Anand Gopalan, Tejasvi Das, Clyde Washburn, P. R. Mukund:
An Ultra-Fast, On-Chip BiST for RF Low Noise Amplifiers. VLSI Design 2005: 485-490 - [c14]Ghanshyam Nayak, Clyde Washburn, P. R. Mukund:
System in a Package Design of a RF Front End System Using Application Specific Reduced Order Models. VLSI Design 2005: 878-881 - 2004
- [c13]Tejasvi Das, Anand Gopalan, Clyde Washburn, P. R. Mukund:
Dynamic Input Match Correction in RF Low Noise Amplifiers. DFT 2004: 211-219 - [c12]Ghanshyam Nayak, Tejasvi Das, T. M. Rao, P. R. Mukund:
DREAM: A Chip-Package Co-Design Tool for RF-Mixed Signal Systems. ISVLSI 2004: 207-210 - [c11]Tejasvi Das, Ghanshyam Nayak, Ponnathpur R. Mukund:
A generic macromodel for coupling between inductors and interconnects for R.F.I.C. layouts. SoCC 2004: 89-92 - [c10]Sripriya R. Bandi, Ponnathpur R. Mukund:
A compensation technique for transistor mismatch in current mirrors. SoCC 2004: 320-323 - [c9]Ghanshyam Nayak, P. R. Mukund:
Chip Package Co-Design of a Heterogeneously Integrated 2.45GHz CMOS VCO using Embedded Passives in a Silicon Package. VLSI Design 2004: 627-630 - [c8]M. Benmansour, P. R. Mukund:
A Tuned Wideband LNA in 0.25µm IBM Process For RF Communication Applications. VLSI Design 2004: 631-634 - [c7]Tejasvi Das, P. R. Mukund:
A Low Noise Current-mode Readout circuit for CMOS Image Sensing Applications. VLSI Design 2004: 635-638 - [c6]Antonija Soldo, Anand Gopalan, P. R. Mukund, Martin Margala:
A Current Sensor for On-Chip, Non-Intrusive Testing of RF Systems. VLSI Design 2004: 1023-1026 - 2003
- [c5]S. Sridharan, Ghanshyam Nayak, P. R. Mukund:
LNA design optimization with reference to ESD protection circuitry. ISCAS (1) 2003: 205-208 - [c4]Rajesh Narasimha, S. B. Rachaiah, Raghuveer M. Rao, P. R. Mukund:
1/f noise modeling using discrete-time self-similar systems. ISCAS (4) 2003: 596-599 - 2002
- [c3]H. Parthasarathy, Ghanshyam Nayak, Ponnathpur R. Mukund:
Analysis of VCO jitter in chip-package co-design. ISCAS (3) 2002: 181-184 - 1995
- [c2]George A. Hadgis, P. R. Mukund:
A novel CMOS monolithic analog multiplier with wide input dynamic range. VLSI Design 1995: 310-314 - 1993
- [c1]P. R. Mukund, V. Mukund, Charles E. Noon:
Signal Routing with Temporal Constraints. ISCAS 1993: 1479-1482
Coauthor Index
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