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ORCIDFrancesco Pappalardo 0002
Person information
- affiliation: STMicroelectronics, Catania, Italy
Other persons with the same name
- Francesco Pappalardo 0001
![[0000-0003-1668-3320]](https://dblp.uni-trier.de./img/orcid-mark.12x12.png "0000-0003-1668-3320")
— University of Catania, Italy
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2020 – today
- 2023
[c8]Luca Ezio Pozzoni, Fabrizio Ferrandi, Loris Mendola, Alfio Antonino Palazzo, Francesco Pappalardo:
Using High-Level Synthesis to model System Verilog procedural timing controls. DATE 2023: 1-6
2010 – 2019
- 2013
- [j5]Riccardo Caponetto, Giovanni Dongola, Francesco Pappalardo, V. Tomasello:
Auto-Tuning and Fractional Order Controller Implementation on Hardware in the Loop System. J. Optim. Theory Appl. 156(1): 141-152 (2013) - 2012
- [j4]Riccardo Caponetto, Giovanni Dongola, Francesco Pappalardo:
Fractional-order simulation tool for the brainstem vestibulo-ocular reflex (VOR). Signal Image Video Process. 6(3): 429-436 (2012) - 2011
- [c7]Nathan Ickes, Yildiz Sinangil, Francesco Pappalardo, Elio Guidetti, Anantha P. Chandrakasan:
A 10 pJ/cycle ultra-low-voltage 32-bit microprocessor system-on-chip. ESSCIRC 2011: 159-162
2000 – 2009
- 2007
- [j3]Giuseppe Notarangelo, Francesco Pappalardo, Elena Salurso, Elio Guidetti:
A Low Power, Scalable and Runtime Customizable Microprocessor Architecture for Image Processing. J. Low Power Electron. 3(1): 36-42 (2007) - [j2]Mauro Olivieri, Francesco Pappalardo, Simone Smorfa, Giuseppe Visalli:
Analysis and Implementation of a Novel Leading Zero Anticipation Algorithm for Floating-Point Arithmetic Units. IEEE Trans. Circuits Syst. II Express Briefs 54-II(8): 685-689 (2007) - 2005
- [c6]Mauro Olivieri, Francesco Pappalardo, Giuseppe Visalli:
statistical analysis, for reducing the energy dissipation in a bus-switch encoder. Circuits, Signals, and Systems 2005: 50-55 - [c5]Mauro Olivieri, Francesco Pappalardo, Giuseppe Visalli:
Design issues for bus switch systems in deep sub-micro metric CMOS technologies. Circuits, Signals, and Systems 2005: 112-117 - [c4]Mauro Olivieri, Francesco Pappalardo, Giuseppe Visalli:
Encoding circuits for low power optical on-chip communications. ISCAS (5) 2005: 5206-5209 - 2004
- [j1]Mauro Olivieri, Francesco Pappalardo, Giuseppe Visalli:
Bus-switch coding for reducing power dissipation in off-chip buses. IEEE Trans. Very Large Scale Integr. Syst. 12(12): 1374-1377 (2004) - [c3]Francesco Pappalardo, Giuseppe Visalli, Mirko Scarana:
An application-oriented analysis of power/precision trade-off in fixed and floating-point arithmetic units for VLSI processors. Circuits, Signals, and Systems 2004: 416-421 - 2002
- [c2]Giuseppe Notarangelo, Marco Gibilaro, Francesco Pappalardo, Agatino Pennisi, Gaetano Palumbo:
Low Power Strategy for a TFT Controller. DSD 2002: 351-354 - [c1]Gaetano Palumbo, Francesco Pappalardo, S. Sannella:
Evaluation on power reduction applying gated clock approaches. ISCAS (4) 2002: 85-88
Coauthor Index
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