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Vinod Viswanath
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2020 – today
- 2024
- [c11]Vinod Viswanath, Kanad Chakraborty:
DFT Static Verification using Early RTL Exploration and Debug for Mobile SoC and Edge AI Applications. VLSID 2024: 293-299
2010 – 2019
- 2019
- [c10]Pranav Ashar, Vinod Viswanath:
Closing the Verification Gap with Static Sign-off. ISQED 2019: 343-347 - 2017
- [c9]Pranav Ashar, Vikas Sachdeva, Vinod Viswanath:
Failures and verification solutions related to untimed paths in SOCs. ISQED 2017: 460-465 - 2016
- [c8]Brian Cline, Saibal Mukhopadhyay, Peter J. Wright, Hai Li, Vinod Viswanath, Paul Wesling, Gang Qu, Ali Iranmanesh:
Welcome. ISQED 2016 - 2013
- [c7]Vinod Viswanath, Rajeev Muralidhar, Harinarayanan Seshadri, Jacob A. Abraham:
On a rewriting strategy for dynamically managing power constraints and power dissipation in SoCs. ISQED 2013: 128-134 - 2012
- [j5]Vinod Viswanath, Rajeev Muralidhar, Harinarayanan Seshadri, Ananth S. Narayan:
Power Management Methods: From Specification and Modeling, to Techniques and Verification. J. Low Power Electron. 8(4): 353-377 (2012) - [j4]Vinod Viswanath, Jacob A. Abraham:
Automatic and Correct Register Transfer Level Annotations for Low Power Microprocessor Design. J. Low Power Electron. 8(4): 424-439 (2012)
2000 – 2009
- 2009
- [j3]Vinod Viswanath, Shobha Vasudevan, Jacob A. Abraham:
Dedicated Rewriting: Automatic Verification of Low Power Transformations in Register Transfer Level. J. Low Power Electron. 5(3): 339-353 (2009) - [c6]Vinod Viswanath, Shobha Vasudevan, Jacob A. Abraham:
Dedicated Rewriting: Automatic Verification of Low Power Transformations in RTL. VLSI Design 2009: 77-82 - 2008
- [j2]Shobha Vasudevan, Vinod Viswanath, Jacob A. Abraham, Jiajin Tu:
Sequential equivalence checking between system level and RTL descriptions. Des. Autom. Embed. Syst. 12(4): 377-396 (2008) - 2007
- [j1]Shobha Vasudevan, Vinod Viswanath, Robert W. Sumners, Jacob A. Abraham:
Automatic Verification of Arithmetic Circuits in RTL Using Stepwise Refinement of Term Rewriting Systems. IEEE Trans. Computers 56(10): 1401-1414 (2007) - [c5]Shobha Vasudevan, Vinod Viswanath, Jacob A. Abraham:
Efficient Microprocessor Verification using Antecedent Conditioned Slicing. VLSI Design 2007: 43-49 - 2006
- [c4]Vinod Viswanath, Jacob A. Abraham, Warren A. Hunt Jr.:
Automatic insertion of low power annotations in RTL for pipelined microprocessors. DATE 2006: 496-501 - [c3]Shobha Vasudevan, Jacob A. Abraham, Vinod Viswanath, Jiajin Tu:
Automatic decomposition for sequential equivalence checking of system level and RTL descriptions. MEMOCODE 2006: 71-80 - 2004
- [c2]Vinod Viswanath:
Multi-log Processor - Towards Scalable Event-Driven Multiprocessors. DSD 2004: 279-286
1990 – 1999
- 1999
- [c1]Dana S. Henry, Bradley C. Kuszmaul, Vinod Viswanath:
The Ultrascalar Processor-An Asymptotically Scalable Superscalar Microarchitecture. ARVLSI 1999: 256-275
Coauthor Index
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