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Ting Wei Chiang

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2000 – 2009

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2007
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Ting Wei Chiang, C. Y. Roger Chen, Wei-Yu Chen:
A technique for selecting CMOS transistor orders. ICCD 2007: 438-443
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Ting Wei Chiang, C. Y. Roger Chen, Wei-Yu Chen:
An efficient gate delay model for VLSI design. ICCD 2007: 450-455

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