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2020 – today
- 2023
[i1]Jason Cong, Michalis Romesis, Joseph R. Shinnerl, Kenton Sze, Min Xie:
Locality and Utilization in Placement Suboptimality. CoRR abs/2305.16413 (2023)
2000 – 2009
- 2007
- [p1]Jason Cong, Michalis Romesis, Joseph R. Shinnerl, Kenton Sze, Min Xie:
Locality and Utilization in Placement Suboptimality. Modern Circuit Placement 2007: 13-36 - 2006
- [j2]Jason Cong, Michail Romesis, Joseph R. Shinnerl:
Fast floorplanning by look-ahead enabled recursive bipartitioning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(9): 1719-1732 (2006) - 2005
- [c9]Ashok Jagannathan, Hannah Honghua Yang, Kris Konigsfeld, Dan Milliron, Mosur Mohan, Michail Romesis, Glenn Reinman, Jason Cong:
Microarchitecture evaluation with floorplanning and interconnect pipelining. ASP-DAC 2005: 8-15 - [c8]Jason Cong, Michail Romesis, Joseph R. Shinnerl:
Fast floorplanning by look-ahead enabled recursive bipartitioning. ASP-DAC 2005: 1119-1122 - [c7]Jason Cong, Michail Romesis, Joseph R. Shinnerl:
Robust mixed-size placement under tight white-space constraints. ICCAD 2005: 165-172 - [c6]Tony F. Chan, Jason Cong, Michail Romesis, Joseph R. Shinnerl, Kenton Sze, Min Xie:
mPL6: a robust multilevel mixed-size placement engine. ISPD 2005: 227-229 - 2004
- [j1]Chin-Chih Chang, Jason Cong, Michail Romesis, Min Xie:
Optimality and scalability study of existing placement algorithms. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(4): 537-549 (2004) - [c5]Jason Cong, Gabriele Nataneli, Michail Romesis, Joseph R. Shinnerl:
An area-optimality study of floorplanning. ISPD 2004: 78-83 - 2003
- [c4]Jason Cong, Ashok Jagannathan, Glenn Reinman, Michail Romesis:
Microarchitecture evaluation with physical planning. DAC 2003: 32-35 - [c3]Jason Cong, Michail Romesis, Min Xie:
Optimality and Stability Study of Timing-Driven Placement Algorithms. ICCAD 2003: 472-479 - [c2]Jason Cong, Michail Romesis, Min Xie:
Optimality, scalability and stability study of partitioning and placement algorithms. ISPD 2003: 88-94 - 2001
- [c1]Jason Cong, Michail Romesis:
Performance-Driven Multi-Level Clustering with Application to Hierarchical FPGA Mapping. DAC 2001: 389-394
Coauthor Index
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