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ORCIDArindam Mukherjee 0001
Person information
- affiliation: University of North Carolina at Charlotte, Charlotte, NC, USA
- affiliation (Ph.D., 2002): University of California, Santa Barbara, CA, USA
Other persons with the same name
- Arindam Mukherjee — disambiguation page
- Arindam Mukherjee 0002
![[0000-0002-2021-0799]](https://dblp.uni-trier.de./img/orcid-mark.12x12.png "0000-0002-2021-0799")
— Indian Institute of Management Ranchi, India - Arindam Mukherjee 0003 — Indian Institute of Technology Madras, India
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2010 – 2019
- 2019
[c19]Arindrajit Seal, Sumanta Bhattacharya, Arindam Mukherjee:
Fog Computing for Real-Time Accident Identification and Related Congestion Control. SysCon 2019: 1-8- 2013
- [c18]Guangyi Cao, Arun Ravindran, Sukumar Kamalasadan, Bharat Joshi, Arindam Mukherjee:
A Cross-Stack Predictive Control Framework for Multimedia Applications. ISM 2013: 403-404 - 2012
- [j11]Aravind Kailas, Valentina Cecchi, Arindam Mukherjee:
A Survey of Communications and Networking Technologies for Energy Management in Buildings and Home Automation. J. Comput. Networks Commun. 2012: 932181:1-932181:12 (2012) - [c17]Reshmi Mitra, Bharat Joshi, Arun Ravindran, Arindam Mukherjee, Ryan S. Adams:
Performance Modeling of Shared Memory Multiple Issue Multicore Machines. ICPP Workshops 2012: 464-473 - 2011
- [c16]Changshu Zhang, Arun Ravindran, Kushal Datta, Arindam Mukherjee, Bharat Joshi:
A machine learning approach to modeling power and performance of chip multiprocessors. ICCD 2011: 45-50
2000 – 2009
- 2009
- [j10]Siddhartha Datta, Bharat Joshi, Arun Ravindran, Arindam Mukherjee:
Efficient parallel testing and diagnosis of digital microfluidic biochips. ACM J. Emerg. Technol. Comput. Syst. 5(2): 10:1-10:17 (2009) - [c15]Jong-Ho Byun, Arun Ravindran, Arindam Mukherjee, Bharat Joshi, David Chassin:
Accelerating the Gauss-Seidel Power Flow Solver on a High Performance Reconfigurable Computer. FCCM 2009: 227-230 - 2008
- [j9]Ravi Kiran Karanam, Arun Ravindran, Arindam Mukherjee:
A stream chip-multiprocessor for bioinformatics. SIGARCH Comput. Archit. News 36(2): 2-9 (2008) - [c14]Reshmi Mitra, Bharat Joshi, Arindam Mukherjee:
Fault-tolerant wearable computing system architecture for self-health management. EIT 2008: 349-354 - 2007
- [j8]Fei Su, William L. Hwang, Arindam Mukherjee, Krishnendu Chakrabarty:
Testing and Diagnosis of Realistic Defects in Digital Microfluidic Biochips. J. Electron. Test. 23(2-3): 219-233 (2007) - [j7]Steven D. Tucker, Arun Ravindran, Christopher Wichman, Arindam Mukherjee:
Design Techniques for Micro-Power Algorithmic Analog-to-Digital Converters. J. Low Power Electron. 3(1): 60-69 (2007) - 2006
- [j6]Kushal Datta, Arindam Mukherjee, Arun Ravindran:
Automated design flow for diode-based nanofabrics. ACM J. Emerg. Technol. Comput. Syst. 2(3): 219-241 (2006) - [j5]Daniel Davids, Siddhartha Datta, Arindam Mukherjee, Bharat Joshi, Arun Ravindran:
Multiple fault diagnosis in digital microfluidic biochips. ACM J. Emerg. Technol. Comput. Syst. 2(4): 262-276 (2006) - [j4]Srikanth S. Mohan, Arun Ravindran, David M. Binkley, Arindam Mukherjee:
Power Optimized Design of CMOS Programmable Gain Amplifiers. J. Low Power Electron. 2(2): 259-270 (2006) - 2005
- [c13]Fei Su, William L. Hwang, Arindam Mukherjee, Krishnendu Chakrabarty:
Defect-oriented testing and diagnosis of digital microfluidics-based biochips. ITC 2005: 10 - 2004
- [c12]Arindam Mukherjee:
On the Reduction of Simultaneous Switching in SoCs. ISVLSI 2004: 262-263 - [c11]Arindam Mukherjee:
Reducing crosstalk noise in high speed FPGAs. SoCC 2004: 163-164 - [c10]Arindam Mukherjee, Rajsaktish Sankaranarayan:
Retiming and clock scheduling to minimize simultaneous switching. SoCC 2004: 259-262 - 2003
- [j3]Arindam Mukherjee, Malgorzata Marek-Sadowska:
Clock and Power Gating with Timing Closure. IEEE Des. Test Comput. 20(3): 32-39 (2003) - [j2]Arindam Mukherjee, Malgorzata Marek-Sadowska:
Wave steering to integrate logic and physical syntheses. IEEE Trans. Very Large Scale Integr. Syst. 11(1): 105-120 (2003) - [j1]Amit Singh, Arindam Mukherjee, Luca Macchiarulo, Malgorzata Marek-Sadowska:
PITIA: an FPGA for throughput-intensive applications. IEEE Trans. Very Large Scale Integr. Syst. 11(3): 354-363 (2003) - [c9]Arindam Mukherjee, Krishna Reddy Dusety, Rajsaktish Sankaranarayan:
A practical CAD technique for reducing power/ground noise in DSM circuits. ACM Great Lakes Symposium on VLSI 2003: 96-99 - 2002
- [c8]Arindam Mukherjee, Kai Wang, Lauren Hui Chen, Malgorzata Marek-Sadowska:
Sizing Power/Ground Meshes for Clocking and Computing Circuit Components. DATE 2002: 176-183 - 2001
- [c7]Amit Singh, Arindam Mukherjee, Malgorzata Marek-Sadowska:
Latency and Latch Count Minimization in Wave Steered Circuits. DAC 2001: 383-388 - [c6]Nobuo Funabiki, Amit Singh, Arindam Mukherjee, Malgorzata Marek-Sadowska:
A Global Routing Technique for Wave-Steering Design Methodology. DSD 2001: 430-437 - [c5]Amit Singh, Arindam Mukherjee, Malgorzata Marek-Sadowska:
Interconnect pipelining in a throughput-intensive FPGA architecture. FPGA 2001: 153-160 - [c4]Ganapathy Parthasarathy, Malgorzata Marek-Sadowska, Arindam Mukherjee, Amit Singh:
Interconnect complexity-aware FPGA placement using Rent's rule. SLIP 2001: 115-121 - 2000
- [c3]Amit Singh, Luca Macchiarulo, Arindam Mukherjee, Malgorzata Marek-Sadowska:
A novel high throughput reconfigurable FPGA architecture. FPGA 2000: 22-29
1990 – 1999
- 1999
- [c2]Arindam Mukherjee, Malgorzata Marek-Sadowska, Stephen I. Long:
Wave pipelining YADDs-a feasibility study. CICC 1999: 559-562 - [c1]Arindam Mukherjee, Ranganathan Sudhakar, Malgorzata Marek-Sadowska, Stephen I. Long:
Wave Steering in YADDs: A Novel Non-Iterative Synthesis and Layout Technique. DAC 1999: 466-471
Coauthor Index
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