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Rasika Dhavse

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2020 – today

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2024
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  - journals/ijcta/JanwadkarD24
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Sudhanshu Janwadkar, Rasika Dhavse:
ASIC implementation of ECG denoising FIR filter by using hybrid Vedic-Wallace tree multiplier. Int. J. Circuit Theory Appl. 52(4): 1621-1646 (2024)
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Sudhanshu Janwadkar, Rasika Dhavse:
ASIC design of power and area efficient programmable FIR filter using optimized Urdhva-Tiryagbhyam Multiplier for impedance cardiography. Microprocess. Microsystems 107: 105048 (2024)
2022
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Sudhanshu Janwadkar, Rasika Dhavse:
Investigation and Analysis of Power Performance Area (PPA) Cards of Digital Multiplier Architectures. J. Circuits Syst. Comput. 31(13): 2250239:1-2250239:34 (2022)
2020
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  - conf/tencon/JanwadkarD20
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Sudhanshu Janwadkar, Rasika Dhavse:
Implementation and Performance Evaluation of Novel Line Adder Architecture for Portable Systems : A Vedic Mathematics Approach. TENCON 2020: 153-158

2010 – 2019

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2011
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Prafulla Galphade, Rasika Dhavse:
Modeling Study of Impact of Surface Roughness on Flicker Noise in MOSFET. ISVLSI 2011: 333-334
2010
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  - conf/ict/ShahDD10
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Nilesh Shah, Rasika Dhavse, Anand D. Darji:
Reading a 4-Bit SLC NAND Flash Memory in 180nm Technology. ICT 2010: 681-685

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