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ORCIDClaudiu Zissulescu
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2000 – 2009
- 2008
[j2]Steven Derrien, Alexandru Turjan, Claudiu Zissulescu, Bart Kienhuis, Ed F. Deprettere:
Deriving efficient control in Process Networks with Compaan/Laura. Int. J. Embed. Syst. 3(3): 170-180 (2008)- [c8]Hristo Nikolov, Mark Thompson, Todor P. Stefanov, Andy D. Pimentel, Simon Polstra, Raj Bose, Claudiu Zissulescu, Ed F. Deprettere:
Daedalus: toward composable multimedia MP-SoC design. DAC 2008: 574-579 - 2007
- [j1]Ming-Yung Ko, Claudiu Zissulescu, Sebastian Puthenpurayil, Shuvra S. Bhattacharyya
, Bart Kienhuis, Ed F. Deprettere:
Parameterized Looped Schedules for Compact Representation of Execution Sequences in DSP Hardware and Software Implementation. IEEE Trans. Signal Process. 55(6-2): 3126-3138 (2007) - 2006
- [c7]Ming-Yung Ko, Claudiu Zissulescu, Sebastian Puthenpurayil:
Parameterized Looped Schedules for Compact Representationof Execution Sequences. ASAP 2006: 223-230 - 2005
- [c6]Claudiu Zissulescu, Bart Kienhuis, Ed F. Deprettere:
Expression Synthesis in Process Networks generated by LAURA. ASAP 2005: 15-21 - [c5]Claudiu Zissulescu, Bart Kienhuis, Ed F. Deprettere:
Communication Synthesis in a multiprocessor environment. FPL 2005: 360-365 - [c4]Mihai-Lucian Cristea, Claudiu Zissulescu, Ed F. Deprettere, Herbert Bos:
FPL-3E: Towards Language Support for Reconfigurable Packet Processing. SAMOS 2005: 82-92 - 2004
- [c3]Todor P. Stefanov, Claudiu Zissulescu, Alexandru Turjan, Bart Kienhuis, Ed F. Deprettere:
System Design Using Kahn Process Networks: The Compaan/Laura Approach. DATE 2004: 340-345 - [c2]Claudiu Zissulescu, Bart Kienhuis, Ed F. Deprettere:
Increasing Pipelined IP Core Utilization in Process Networks Using Exploration. FPL 2004: 690-699 - 2003
- [c1]Claudiu Zissulescu, Todor P. Stefanov, Bart Kienhuis, Ed F. Deprettere:
Laura: Leiden Architecture Research and Exploration Tool. FPL 2003: 911-920
Coauthor Index
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