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2010 – 2019
- 2019
[j1]Elias de Almeida Ramos
, Guilherme Bontorin, Ricardo Reis:
A New Nonlinear Global Placement for FPGAs: The Chaotic Place. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(6): 2165-2174 (2019)- 2018
- [c10]Elias de Almeida Ramos, Guilherme Bontorin, Ricardo Reis:
A nonlinear placement for FPGAs: The chaotic place. LASCAS 2018: 1-4 - [c9]Luciana Mendes da Silva, Guilherme Bontorin, Ricardo Reis:
Reducing the amount of transistors by gate merging. LASCAS 2018: 1-4 - 2016
- [c8]Priscila C. Holanda, Cezar R. W. Reinbrecht, Guilherme Bontorin, Vitor V. Bandeira, Ricardo A. L. Reis:
DHyANA: A NoC-based neural network hardware architecture. ICECS 2016: 177-180 - 2015
- [c7]Vitor V. Bandeira, Vivianne L. Costa, Guilherme Bontorin, Ricardo A. L. Reis:
Low Latency FPGA Implementation of Izhikevich-Neuron Model. IESS 2015: 210-217 - [c6]Diego Tumelero, Guilherme Bontorin, Ricardo Reis:
Overhead for independent net approach for Global Routing. LASCAS 2015: 1-4 - [c5]Roger Caputo-Llanos, Diego Sousa, Marco Terres, Guilherme Bontorin, Ricardo Reis, Marcelo O. Johann:
Energy-efficient Level Shifter topology. PATMOS 2015: 148-151 - 2014
- [c4]Marco Terres, Cristina Meinhardt, Guilherme Bontorin, Ricardo Reis:
Exploring more efficient architectures for Multiple Dynamic Supply Voltage designs. LASCAS 2014: 1-4 - 2013
- [c3]Marco Terres, Cristina Meinhardt, Guilherme Bontorin, Ricardo Reis:
A novel approach to reduce power consumption in level shifter for Multiple Dynamic Supply Voltage. ICECS 2013: 715-718
2000 – 2009
- 2008
- [c2]Guilherme Bontorin, Colin Lopez, Yannick Bornat, Noëlle Lewis, Sylvie Renaud, Mathieu C. Garenne, Gwendal Le Masson:
A real-time setup for multisite signal recording and processing in living neural networks. ISCAS 2008: 2953-2956 - 2007
- [c1]Guilherme Bontorin, Jean Tomas, Sylvie Renaud:
Low noise and low cost neural amplifiers. ICECS 2007: 1324-1327
Coauthor Index
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